Advance Program (Ver.3.21 97/4/8) (Please use courier font to see this.) IEEJ (The Institute of Electrical Engineers of Japan) The 1st International Analog VLSI Workshop May 6,7,8, 1997 Dreese Laboratories 260, The Ohio State University, Columbus, OH, USA Cooperation: The Ohio State University IEEE Circuits and Systems Society Tokyo Chapter Time Table of the 1st Analog VLSI Workshop Sessions May 6 7 8 ------------------------------------------------------------- AM 10:00 TU-1 9:00 WE-1 TH-1 | Opening Ceremony | 4 papers 4 papers 10:20 11:00 TU-2 10:40 WE-2 TH-2 | 3 papers | 4 papers 4 papers 12:00 12:00 ------------------------------------------------------------- PM 14:00 TU-3 14:00 WE-3 | 4 papers | Special Talk sightseeing 15:20 15:10 at OSU etc. 15:40 TU-4 15:40 WE-4 | 4 papers | Special Talk 17:00 16:50 19:30 banquet ------------------------------------------------------------- May, 6th (AM) TU-1 10:00- Opening Ceremony TU-2 11:00-11:20 (1) ECT-97-32 Low Power Dissipation Technique for OTA Eitake Ibaragi, Akira Hyogo and Keitaro Sekine (Science University of Tokyo, Japan) 11:20-11:40 (2) ECT-97-33 Reduction in Element Value Spreads on Integrator-Based Filters Kazuyuki Wada, Shigetaka Takagi and Nobuo Fujii (Tokyo Institute of Technology, Japan) 11:40-12:00 (3) ECT-97-34 A Single-Ended-Input Fully-Balanced-Output CMOS Circuit Changku Hwang(Micrys, Inc., U.S.A.), Akira Hyogo (Science University of Tokyo, Japan) and Mohammed Ismail (The Ohio State University, U.S.A.) (PM) TU-3 14:00-14:20 (4) ECT-97-35 A Robust Low Voltage CMOS Rail to Rail OpAmp Architecture Chi-Hung Lin, Hong-Wu Chi (The Ohio State University, U.S.A.), Changku Hwang (Micrys, Inc., U.S.A.) and Mohammed Ismail (The Ohio State University, U.S.A.) 14:20-14:40 (5) ECT-97-36 Design Aspects of a Rail-to-Rail CMOS Op Amp S.L.J. Gierkink, P.J. Holzmann, R.J. Wiegerink and R.F. Wassenaar (The MESA RESEARCH INSTITUTE of the University of Twente, The Netherlands) 14:40-15:00 (6) ECT-97-37 Class AB output stages of the integrated operational and power amplifiers Vadim Ivanov (Burr-Brown Corp., U.S.A.) 15:00-15:20 (7) ECT-97-38 High-Performance CMOS Building blocks for Hearing Aid Devices Jose Silva-Martinez, Guillermo Espinosa Flores-Verdad, Jorge Salcedo Suner, Rogelio Rojas Hernandez, Sergio Solis Bustos and Zahira Perez Rivera (National Institute of Astrophysics Optics and Electronics, Mexico) TU-4 15:40-16:00 (8) ECT-97-39 A 3V CMOS Continuous-Time Fully-balanced Current-Mode Integrator with Complementary Transconductance J. H. Bang, G. H. Lee, J. C. Ahn and D. Y. Kim (Chonbuk National University, Korea) 16:00-16:20 (9) ECT-97-40 A Realization of Wave Active Filter using CFAs Yasutomo Kinugasa(Matsue National College of Technology, Japan), Masashi Ishida and Yutaka Fukui (Tottori University, Japan) 16:20-16:40 (10)ECT-97-41 A Current-to-Frequency Converter Using Switched-Current Circuits Yukihiro Kuroda, Akira Hyogo and Keitaro Sekine (Science University of Tokyo, Japan) 16:40-17:00 (11)ECT-97-42 LV Rail to Rail CMOS CCII and Its Application to Filter Design Hassan O. Elwan and Ahmed M. Soliman (Cairo University, Egypt) May 7th (AM) WE-1 9:00-9:20 (12)ECT-97-43 Neuron-MOS Parallel Search Hardware for Real-Time Signal Processing Tsutomu Nakai, Tadashi Shibata and Tadahiro Ohmi (Tohoku University, Japan) 9:20-9:40 (13)ECT-97-44 Neuron-MOS Analog/Digital Merged Circuit Technology for Center-of-Mass Tracking Ning Mei Yu, Tadashi Shibata and Tadahiro Ohmi (Tohoku University, Japan) 9:40-10:00 (14)ECT-97-45 A Modular Analog NLMS Structure for Adaptive Filtering Luis Nino-de-Rivera, Hector Perez-Meana (National Polytechnic Institute, Mexico) and Edgar Sanchez-Sinencio (Texas A&M University, U.S.A.) 10:00-10:20 (15)ECT-97-46 Efficient Building Blocks for On-Chip Learning Neural Networks Miguel Melendez-Rodriguez and Jose Silva-Martinez (National Institute of Astrophysics Optics and Electronics, Mexico) WE-2 10:40-11:00 (16)ECT-97-47 An Area-Efficient and Highly-Linear CMOS Four-Quadrant Analog Multiplier Moonjae Jeong, Shigetaka Takagi and Nobuo Fujii (Tokyo Institute of Technology, Japan) 11:20-11:40 (17)ECT-97-48 LV CMOS Analog VLSI Composite Cell Design and Its Application to High Speed Multiplier. Changku Hwang (Micrys, Inc., U.S.A.), Akira Hyogo (Science University of Tokyo, Japan), Mohammed Ismail and Hong-Sun Kim (The Ohio State University, U.S.A.) 11:20-11:40 (18)ECT-97-49 A CMOS VCO Tuned by an On-chip Inductor and MOS Variable Capacitors Akira Yoshida and Takashi Taya (OKI Electric Industry Co.,Ltd., Japan) 11:40-12:00 (19)ECT-97-50 High Frequency GaAs MESFET current mirror Nobukazu Takai and Nobuo Fujii (Tokyo Institute of Technology, Japan) (PM) WE-3 14:00-15:10 (20)ECT-97-51 [Special Talk] The Challenge of Creating Future Generation of Analog Engineers. Keitaro Sekine (Science University of Tokyo, Japan) WE-4 15:40-16:50 (21)ECT-97-52 [Special Talk] LV/LP VLSI : An Introduction and Socioeconomic Impact Mohammed Ismail(The Ohio State University, U.S.A.) May 8th (AM) TH-1 9:00-9:20 (22)ECT-97-53 High Dynamic Range Design for Sigma-Delta Modulator with Wide Input Ranges Hung-Chuan Pai and Steven B. Bibyk (The Ohio State University, U.S.A.) 9:20-9:40 (23)ECT-97-54 A New Lowpass Filter for the Fast Frequency Acquisition of the PLL Frequency Synthesizer Yasuaki Sumi(Tottori SANYO Electric Co., Japan), Shigeki Obote(Tottori University, Japan), Kazutoshi Tsuda(Japan Radio Co., Japan), Kouichi Syoubu and Yutaka Fukui(Tottori University, Japan) 9:40-10:00 (24)ECT-97-55 A Novel (N+1/2) Pulse Swallow Divider for the PLL Frequency Synthesizer Yasuaki Sumi(Tottori SANYO Co., Japan), Yasunori Tanimoto(SINKO MEX Co., Japan), Kazutoshi Tsuda(Japan Radio Co., Japan), Shigeki Obote, Kouichi Syoubu and Yutaka Fukui(Tottori University, Japan) 10:00-10:20 (25)ECT-97-56 A Small Ethernet Hardware for Measurement Equipments with Microprocessor Nobuhiro Shiramizu, Akira Hyogo and Keitaro Sekine (Science University of Tokyo, Japan) TH-2 10:40-11:00 (26)ECT-97-57 An Analog Adaptive Decision Feedback Equalizer Structure For Land Mobile Communications Mariko Nakano-Miyatake and Hector Perez-Meana (National Polytechnic Institute, Mexico) 11:00-11:20 (27)ECT-97-58 Analysis and Implementation of Multi-Coupled Chaotic Oscillators Koichiro Tsutsumi, Akira Hyogo and Keitaro Sekine (Science University of Tokyo, Japan) 11:20-11:40 (28)ECT-97-59 LV/LP CMOS Square-Law Composite Transistors for Analog VLSI Applications Akira Hyogo(Science University of Tokyo, Japan), Changku Hwang(Micrys, Inc., U.S.A.), Mohammed Ismail (The Ohio State University, U.S.A.) and Keitaro Sekine (Science University of Tokyo, Japan) 11:40-12:00 (29)ECT-97-60 Current-Mode Continuous-Time Filters Using Widlar Current Mirrors Joung Chul Ahn (Electronics and Telecommunications Research Institute, Korea), Takeshi Yanagisawa (Shibaura Institute of Technology, Japan), Nobuo Fujii (Tokyo Institute of Technology, Japan) and Chang Goo Kang (Electronics and Telecommunications Research Institute, Korea) ---------------------------------------------------------------------------------- Organizing Committee Chair: Nobuo Fujii (Tokyo Inst. of Tech.) Secretaries: Masayuki Ishikawa (Kisarazu National College of Tech.) Hiroshi Tanimoto (Toshiba Corp.) Futao Yamaguchi (Sony Corp.) Co-Secretary: Akira Hyogo (Science Univ. of Tokyo) Members: Takahiro Inoue (Kumamoto Univ.) Mitsuo Okine (Hiroshima Inst. of Tech.) Yuichi Ono (Electrotechnical Laboratory) Kazuo Kato (Hitachi Ltd.) Noriyoshi Kambayashi (Nagaoka Univ. of Tech.) Kazuyuki Saijyo (Sony Corp.) Noboru Shibuya (Takusyoku Univ.) Yasuhiro Sugimoto (Chuo Univ.) Keitaro Sekine (Science Univ. of Tokyo) Yoshifumi Sekine (Nihon Univ.) Shigetaka Takagi (Tokyo Inst. of Tech.) Toshiyuki Tahara (OKI Electric Industory Co. Ltd) Tuneo Tsukahara (NTT) Yutaka Fukui (Tottori Univ.) Masataka Mitani (Matsushita Electric Works, Ltd.) Seijiro Moriyama (Toshiba Corp.) Masaki Yamakawa (Mitsubishi Electric Corp.) Masatsune Yamaguchi (Chiba Univ.) Hiromichi Watanabe (Niigata Univ.) Local Arrangement Chairs: Mohammed Ismail (Ohio state Univ.) Steven B. Bibyk (Ohio state Univ.) ---------------------------------------------------------------------------