This International Analog VLSI Workshop is sponsored by
the Research Committee on Electronic Circuits of the IEEJ (The Institute of Electrical Engineers of Japan).
The purpose of the workshop is the exchange of information, ideas and recent research results on analog VLSI circuits and their applications. The main objective is to provide an informal setting for a group of analog VLSI specialists from both industry and academia worldwide, to meet and brainstorm.
The 2nd Analog VLSI Workshop will be held at DAYS INN, Santa Clara, CA, USA, on 5th-6th June. The dates and locations will be indicated below:
Further information can be obtained by contacting Dr. Akira Hyogo at:
Prof. Akira Hyogo
Department of Electrical Engineering
Faculty of Science and Technology
Science University of Tokyo
2641 Yamazaki, Noda-shi, Chiba, 278-8510, Japan
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This page was created on Nov. 20, 1997 by Dr. Akira Hyogo.
Copyright (c) 1997-1998 by IEEJ